Q. No 26) Gray code is-
(a) Weighted code
(b) Unweighted code
(c) Light weighted
(d) None of the above
Answer: (b) Unweighted code
Q. No 27) CMOS stands for-
(a) Complementary metal-oxide-semiconductor
(b) Complex metal oxide semiconductor
(c) Complete metal oxide semiconductor
(d) None of the above
Answer: (a) Complementary metal-oxide-semiconductor
Q. No 28) TPST stands for-
(a) Tough pole single throw
(b) Triple pole single throw
(c) Tight pole single throw
(d) None of the above
Answer: (b) Triple pole single throw
Q. No 29) Total number of the memory locations that a CPU with a 16-bit program counter can address.
(a) 16k
(b) 64k
(c) 256k
(d) 32 k
Answer: (b) 64k
Q. No 30) Switches can be-
(a) one way
(b) Two way
(c) Threeway
(d) All of the above
Answer: (d) All of the above
Q. No 31) The min-terms corresponding to decimal number 14 is-
(a) ABCD
(b) (ABCD)
(c) A+B+C+D
(d) A’+B’+C’+D
Answer: (d) A’+B’+C’+D
Q. No 32) Programmers use organizations called ___ to represent the data used in computations?
(a) Data types
(b) Data storage
(c) Data Structure
(d) Data class
Answer: (c) Data Structure
Q. No 33) Modem stands for-
(a) Modulator and demodulator
(b) Mounting and Demounting
(c) Module and demodule
(d) None of the above
Answer: (a) Modulator and demodulator
Q. No 34) DMM stands for-
(a) Direct Multimeter
(b) digital multimeter
(c) digging multimeter
(d) none of the above
Answer: (b) digital multimeter
Q. No 35) The address increment between the elements must be specified?
(a) false
(b) true
(c) not necessary
(d) none of the above
Answer: (b) true
Q. No 36) In pipelining when an instruction is installed, are all instructions issued?
(a) true
(b) false
(c) partially true
(d) none of the above
Answer: (a) true
Q. No 37) MAR does?
(a) Holds the last instruction fetched
(b) Holds data to write or last data read
(c) Specify address for reading or write operation
(d) Holds the address of the next instruction to be fetched
Answer: (c) Specify address for reading or write operation
Q. No 38) IR does?
(a) Holds the last instruction fetched
(b) Holds data to write or last data read
(c) Specify address for reading or write operation
(d) Holds the address of the next instruction to be fetched
Answer: (b) Holds data to write or last data read
Q. No 39) PC does?
(a) Holds the last instruction fetched
(b) Holds data to write or last data read
(c). Specify address for reading or writing operation
(d) Holds the address of the next instruction to be fetched
Answer: (d) Holds the address of the next instruction to be fetched
Q. No 40) The methods used to simplify the Boolean expression is-
(a) k-map
(b) Quine Mcclusky
(c) Both a and b
(d) None
Answer: (c) Both a and b
Q. No 41) Main memory stores ___ and ___.
(a) Data, instructions
(b) Data, address
(c) Address, instructions
(d) None of the above
Answer: (a) Data, instructions
Q. No 42) Postulate P3 indicates?
(a) Only . operators are commutative
(b) Only + operators are commutative
(c) Both . and + operators are commutative
(d) None of the above
Answer: (c) Both . and + operators are commutative
Q. No 43) Let X and Y are the input and Z be the output of the NAND gate, the value of the Z is given by-
(a) X+Y
(b) X.Y
(c) (X.Y)’
(d) X’.Y’
Answer: (c) (X.Y)’
Q. No 44) The instruction queue is ___ storage area ___ may contain multiple functional pipelines for arithmetic logic functions.
(a) LIFO and instruction unit
(b) FIFO and execution unit
(c) Filo and instruction queue
(d) All of the above
Answer: (b) FIFO and execution unit
Q. No 45) The study of Computer architecture involves both ___ organization and ___ requirements.
Hardware & Software
(b) Register & Addressing Modes
(c) Assembly & operation codes
(d) Software & CPU
Answer: (b) Register & Addressing Modes
Q. No 46) The moving part that applies the operating force to the contacts is called the ___ and maybe a ___.
(a) Toggle and actuator
(b) Both are toggle
(c) Actuator and toggle
(d) None of the above
Answer: (c) Actuator and toggle
Q. No 47) The NAND gate output for input values 0 and 1 is ___.
The NOR gate output for input values 1 and 0 is ___.
(a) 1 and 0
(b) 0 and 1
(c) 1 and 1
(d) 0 and 0
Answer: (a) 1 and 0
Q. No 48) SISO means ___ SIPO means ___.
(a) serial in serial out and serial out serial in
(b) both are same
(c) serial in serial out and serial in parallel out
(d) serial out serial in and serial in serial out
Answer: (c) serial in serial out and serial in parallel out
Q. No 49) Decimal means base ___ The value of bit pattern 11111111 is ___.
(a) 255 and 10
(b) 1 and 0
(c) 10 and 255
(d) 0 and 1
Answer: (c) 10 and 255
Q. No 50) (144) base8 and (64) base16 means?
(a) 1100100 base2 and 1101100 base2
(b) 1100100 base2 and 1100100 base2
(c) 1101100 base2 and 1100100 base2
(d) 1100110 base2 and 1100110 base2
Answer: (b) 1100100 base2 and 1100100 base2
Download Digital LogicDesign MCQs with Answers pdf
Conclusion
The test covers a variety of topics in logic design, including gates, circuits, timing diagrams, and state tables. The questions are meant to test your understanding of these concepts and your ability to apply them to real-world problems.
To do well on the test, you need to be well-versed in all of these topics and be able to think through problems logically. The best way to prepare for the test is to practice, practice, practice.
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