Computer architecture and organization MCQs question bank with answers pdf | Computer Organization and architecture MCQ question bank with answers pdf. COA mcq with answers pdf.
Here, we provide comprehensive coverage of topics related to this field, including memory hierarchy, bus structures and instruction sets.
Computer architecture and organization MCQs with answers
1. EDSAC stands for.
a. Electronic display storage automatic calculator
b. Electronic delay storage automatic circuit
c. Electronic delay storage automatic calculator
d. Electronic display automatic circuit
Ans: c
2. The smallest machines are called ___.
a. Microcomputers
b. Minicomputer
c. Micromini computers
d. Mainframe computer
Ans: a
3. ___ computers are used for business data processing.
a. Micro
b. Mini
c. Micro mini
d. Mainframe
Ans: d
4. ___ defines the way in which the components of a computer are interrelated.
a. Structure
b. Function
c. Architecture
d. Organization
Ans: a
5. ___ Refers to those attributes of a computer system that are visible to a programmer.
a. Structure
b. Function
c. Architecture
d. Organization
Ans: c
6. Each element in a vector is a ___ quantity.
A. Vector
B. Scalar
C. Numeric
D. Alphanumeric
Ans: b
7. Structure of Babbage’s Difference Engine consists of ___.
a. Number of registers
b. The number of Mechanical registers
c. The number of Electromechanical register
d. Number of Electrostatic registers
Ans: b
8. Memory is large ___.
a. Array of bytes
b. The array of bits
c. Stock
d. none of the above
Ans: a
9. The number of bits in each word is called the computer.
a. Word length
b. Word width
c. Word width
d. Word height
Ans: a
10. RAM is usually called ___.
a. Physical memory
b. Logical Memory
c. Conceptual memory
d. Users Memory
Ans: a
11. Carry, Overflow, negative, zero results are also called ___.
a. Flag bits
b. Conditional bits
c. Status bits
d. None of the above
Ans: c
12. ___ is the core of the CPU.
a. CU
b. ALU
c. Memory
d. None of the above
Ans: b
13. Control Inputs tell the circuit ___ with the data.
a. When do
b. What to do
c. What and when to do
d. None of the above
Ans: c
14. ___ control unit determines the address of the next instruction be executed and loads it into the program counter.
a. Instruction Interpretation
b. Instruction sequencing
c. Instruction regulation
d. Instruction composition
Ans: b
15. A bus consists of ___ wires.
a. Exactly One
b. 0 or 1
c. 1 or less
d. 1 or more
Ans: d
16. There are ___ kinds of buses.
a. One
b. Two
c. Three
d. Four
Ans: c
17. Which of them is a CPU register.
a. PC
b. MAR
c. MDR
d. All of the above
Ans: d
18. ___ is a special purpose register designated to hold the result of an operation performed by the ALU.
a. PC
b. IR
c. MDR
d. ACC
Ans: d
19. Program counter is ___.
a. User-visible required
b. Control register
c. Status register
d. Data register
Ans: a
20. ___ can be assigned to a variety of functions by the programmer.
a. Data register
b. General-purpose registers
c. Address registers
d. Index registers
Ans: b
21. Generals purples registers can be considered for.
a. Orthogonal usage
b. Non-orthogonal usage
c. Orthogonal and non-orthogonal usage
d. None of the above
Ans: c
22. Stock instructions like push, pop, and others need not contain an ___ stock operand.
a. Explicit
b. Implicit
c. Static
d. Dynamic
Ans: a
23. Condition codes are also referred to as ___.
a. Index register
b. Stock pointer
c. Segment pointer
d. Flag
Ans: d
24. PSW stands for.
a. Program status word
b. Process status word
c. Program status width
d. process status width
Ans: a
25. Which of the operation is not performed by the CPU.
a. Fetch instruction
b. Interpret instruction
c. Fetch data
d. Input data
Ans: d
26. Most popular computer architecture is :
a. The stock machine
b. Accumulator machine
c. Load/store machine
d. All of the above
Ans: d
27. The CPU of 8085 is organized around ___.
a. Multiple 16-bit internal bus
b. Single 8-bit internal bus
c. Single 16-bit internal bus
d. Multiple 8-bit internal buses
Ans: b
28. MBR stands for.
a. Memory buffer register
b. Machine buffer register
c. Memory backward reader
d. Machine backward register
Ans: a
29. Stock pointer is a ___ register.
a. 8-bit
b. 16-bit
c. 32-bit
d. 64-bit
Ans: b
30. ___ is used as a high order 8 bits of MAR.
a. Data buffer
b. Memory buffer register
c. Address buffer
d. Address/data buffer
Ans: c
31. 8000 Machine consists of ___ 16-bit general-purpose register.
a. Eighteen
b. Sixteen
c. Twenty
d. Nineteen
Ans: b
32. In which machine every register is a general-purpose register.
a. z8000
b. MC 68000
c. Intel 8085
d. Intel 8086
Ans: d
33. The processing required for a single instruction is called ___.
a. Fetch cycle
b. Execution cycle
c. Instruction cycle
d. Branch cycle
Ans: c
34. The fetched instruction is stored in the CPU register known as.
a. IRC Instruction register
b. PC Program counter
c. MARC Memory address Register
d. MDRC memory Data Register
Ans: a
35. ___ instruction specifies the requirements of execution is tattered.
a. Control
b. CPU-memory transfer
c. CPU-I/O transfer
d. None of the above
Ans: a
36. I AC stands for.
a. Instruction address circuit
b. instruction Address calculation
c. Interleaved address calculation
d. None of the above
Ans: b
37. IOD stands for.
a. Instruction operand decoding
b. Instruction opcode decoding
c. Instruction operation decoding
d. None of the above
Ans: c
38. OAC stands for.
a. Operand Address calculation
b. Operator address calculation
c. Operation address calculation
d. None of the above
Ans: a
39. A computer consists of ___ basic types of modules.
a. One
b. Two
c. Three
d. Four
Ans: c
40. Collection of paths connecting the modules is called ___.
a. Interconnection structure
b. Intercalated structure
c. Inter-related structure
d. None of the above
Ans: b
Computer Networks MCQ Questions and Answers
41. State True or False.
1. “MOVE Y, A” is a two address instruction.
2. “MUL T, D, E” is a three address instruction.
A. 1-True, 2-True
B. 1-True, 2-False
C. 1-False, 2-True
D. 1-False, 2-False
Ans: a
42. The unit of data transferred from external memory is termed as ___.
A. Lines
B. Words
C. Sectors
D. Blocks
Ans: d
43. State True or False.
1. CPU’s local memories are in the form of registers.
2. RAM is an example of internal memory.
A. 1-True, 2-True
B. 1-True, 2-False
C. 1-False, 2-True
D. 1-False, 2-False
Ans: a
44. State True or False.
1. 9 bits word length is common in computers.
2. For internal memory, the unit of transfer is equal to the number of data lines into and out of the memory module.
A. 1-True, 2-True
B. 1-False, 2-True
C. 1-True, 2-False
D. 1-False, 2-False
Ans: b
45. Tape units have ___ access.
A. Sequential
B. Random
C. Direct
D. Associative
Ans: c
46. Generally ___ is used to hold the data temporarily.
A. Buffers
B. ROMs
C. EPROMs
D. Magnetic disks
Ans: a
47. State True or False.
1. The data transfer rate of peripherals is often much slower than that of the memory or CPU.
2. Peripherals often use different data formats and word lengths than the computer system to which they are attached.
A. 1-True, 2-True
B. 1-True, 2-False
C. 1-False, 2-True
D. 1-False, 2-False
Ans: a
48. Memory Buffer Register (MBR) is connected to ___.
A. Control Bus
B. Address Bus
C. Data Bus
D. System Bus
Ans: c
49. State True or False.
1. Program Counter (PC. holds the address of the next instruction to be fetched.
2. Instruction Register (IR) holds the last instruction fetched.
A. 1-True, 2-True
B. 1-True, 2-False
C. 1-False, 2-True
D. 1-False, 2-False
Ans: a
50. ___ architecture is also known as systolic arrays for pipelined execution of specific algorithms.
A. MISD (Multiple Instruction streams over Single Datastream)
B. SISD (Single Instruction stream over Single Datastream)
C. SIMD (Single Instruction stream over Multiple Data streams)
D. MIMD (Multiple Instruction streams over Multiple Data streams)
Ans: a
Computer architecture and organization mcqs with answers are an important tool to help users understand the fundamentals of computer systems. They provide a way to test knowledge and improve understanding of topics such as memory, storage, instruction formats and pipelining.
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